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170 lines
9.9 KiB
C
170 lines
9.9 KiB
C
/*
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* Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "webrtc/common_audio/signal_processing/include/signal_processing_library.h"
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// Version of WebRtcSpl_DownsampleFast() for MIPS platforms.
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int WebRtcSpl_DownsampleFast_mips(const int16_t* data_in,
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int data_in_length,
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int16_t* data_out,
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int data_out_length,
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const int16_t* __restrict coefficients,
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int coefficients_length,
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int factor,
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int delay) {
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int i;
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int j;
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int k;
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int32_t out_s32 = 0;
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int endpos = delay + factor * (data_out_length - 1) + 1;
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int32_t tmp1, tmp2, tmp3, tmp4, factor_2;
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int16_t* p_coefficients;
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int16_t* p_data_in;
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int16_t* p_data_in_0 = (int16_t*)&data_in[delay];
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int16_t* p_coefficients_0 = (int16_t*)&coefficients[0];
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#if !defined(MIPS_DSP_R1_LE)
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int32_t max_16 = 0x7FFF;
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int32_t min_16 = 0xFFFF8000;
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#endif // #if !defined(MIPS_DSP_R1_LE)
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// Return error if any of the running conditions doesn't meet.
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if (data_out_length <= 0 || coefficients_length <= 0
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|| data_in_length < endpos) {
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return -1;
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}
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#if defined(MIPS_DSP_R2_LE)
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__asm __volatile (
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".set push \n\t"
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".set noreorder \n\t"
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"subu %[i], %[endpos], %[delay] \n\t"
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"sll %[factor_2], %[factor], 1 \n\t"
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"1: \n\t"
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"move %[p_data_in], %[p_data_in_0] \n\t"
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"mult $zero, $zero \n\t"
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"move %[p_coefs], %[p_coefs_0] \n\t"
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"sra %[j], %[coef_length], 2 \n\t"
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"beq %[j], $zero, 3f \n\t"
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" andi %[k], %[coef_length], 3 \n\t"
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"2: \n\t"
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"lwl %[tmp1], 1(%[p_data_in]) \n\t"
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"lwl %[tmp2], 3(%[p_coefs]) \n\t"
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"lwl %[tmp3], -3(%[p_data_in]) \n\t"
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"lwl %[tmp4], 7(%[p_coefs]) \n\t"
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"lwr %[tmp1], -2(%[p_data_in]) \n\t"
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"lwr %[tmp2], 0(%[p_coefs]) \n\t"
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"lwr %[tmp3], -6(%[p_data_in]) \n\t"
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"lwr %[tmp4], 4(%[p_coefs]) \n\t"
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"packrl.ph %[tmp1], %[tmp1], %[tmp1] \n\t"
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"packrl.ph %[tmp3], %[tmp3], %[tmp3] \n\t"
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"dpa.w.ph $ac0, %[tmp1], %[tmp2] \n\t"
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"dpa.w.ph $ac0, %[tmp3], %[tmp4] \n\t"
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"addiu %[j], %[j], -1 \n\t"
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"addiu %[p_data_in], %[p_data_in], -8 \n\t"
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"bgtz %[j], 2b \n\t"
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" addiu %[p_coefs], %[p_coefs], 8 \n\t"
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"3: \n\t"
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"beq %[k], $zero, 5f \n\t"
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" nop \n\t"
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"4: \n\t"
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"lhu %[tmp1], 0(%[p_data_in]) \n\t"
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"lhu %[tmp2], 0(%[p_coefs]) \n\t"
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"addiu %[p_data_in], %[p_data_in], -2 \n\t"
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"addiu %[k], %[k], -1 \n\t"
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"dpa.w.ph $ac0, %[tmp1], %[tmp2] \n\t"
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"bgtz %[k], 4b \n\t"
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" addiu %[p_coefs], %[p_coefs], 2 \n\t"
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"5: \n\t"
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"extr_r.w %[out_s32], $ac0, 12 \n\t"
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"addu %[p_data_in_0], %[p_data_in_0], %[factor_2] \n\t"
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"subu %[i], %[i], %[factor] \n\t"
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"shll_s.w %[out_s32], %[out_s32], 16 \n\t"
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"sra %[out_s32], %[out_s32], 16 \n\t"
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"sh %[out_s32], 0(%[data_out]) \n\t"
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"bgtz %[i], 1b \n\t"
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" addiu %[data_out], %[data_out], 2 \n\t"
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".set pop \n\t"
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: [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3),
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[tmp4] "=&r" (tmp4), [p_data_in] "=&r" (p_data_in),
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[p_data_in_0] "+r" (p_data_in_0), [p_coefs] "=&r" (p_coefficients),
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[j] "=&r" (j), [out_s32] "=&r" (out_s32), [factor_2] "=&r" (factor_2),
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[i] "=&r" (i), [k] "=&r" (k)
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: [coef_length] "r" (coefficients_length), [data_out] "r" (data_out),
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[p_coefs_0] "r" (p_coefficients_0), [endpos] "r" (endpos),
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[delay] "r" (delay), [factor] "r" (factor)
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: "memory", "hi", "lo"
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);
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#else // #if defined(MIPS_DSP_R2_LE)
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__asm __volatile (
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".set push \n\t"
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".set noreorder \n\t"
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"sll %[factor_2], %[factor], 1 \n\t"
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"subu %[i], %[endpos], %[delay] \n\t"
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"1: \n\t"
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"move %[p_data_in], %[p_data_in_0] \n\t"
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"addiu %[out_s32], $zero, 2048 \n\t"
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"move %[p_coefs], %[p_coefs_0] \n\t"
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"sra %[j], %[coef_length], 1 \n\t"
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"beq %[j], $zero, 3f \n\t"
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" andi %[k], %[coef_length], 1 \n\t"
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"2: \n\t"
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"lh %[tmp1], 0(%[p_data_in]) \n\t"
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"lh %[tmp2], 0(%[p_coefs]) \n\t"
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"lh %[tmp3], -2(%[p_data_in]) \n\t"
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"lh %[tmp4], 2(%[p_coefs]) \n\t"
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"mul %[tmp1], %[tmp1], %[tmp2] \n\t"
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"addiu %[p_coefs], %[p_coefs], 4 \n\t"
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"mul %[tmp3], %[tmp3], %[tmp4] \n\t"
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"addiu %[j], %[j], -1 \n\t"
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"addiu %[p_data_in], %[p_data_in], -4 \n\t"
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"addu %[tmp1], %[tmp1], %[tmp3] \n\t"
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"bgtz %[j], 2b \n\t"
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" addu %[out_s32], %[out_s32], %[tmp1] \n\t"
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"3: \n\t"
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"beq %[k], $zero, 4f \n\t"
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" nop \n\t"
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"lh %[tmp1], 0(%[p_data_in]) \n\t"
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"lh %[tmp2], 0(%[p_coefs]) \n\t"
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"mul %[tmp1], %[tmp1], %[tmp2] \n\t"
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"addu %[out_s32], %[out_s32], %[tmp1] \n\t"
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"4: \n\t"
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"sra %[out_s32], %[out_s32], 12 \n\t"
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"addu %[p_data_in_0], %[p_data_in_0], %[factor_2] \n\t"
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#if defined(MIPS_DSP_R1_LE)
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"shll_s.w %[out_s32], %[out_s32], 16 \n\t"
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"sra %[out_s32], %[out_s32], 16 \n\t"
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#else // #if defined(MIPS_DSP_R1_LE)
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"slt %[tmp1], %[max_16], %[out_s32] \n\t"
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"movn %[out_s32], %[max_16], %[tmp1] \n\t"
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"slt %[tmp1], %[out_s32], %[min_16] \n\t"
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"movn %[out_s32], %[min_16], %[tmp1] \n\t"
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#endif // #if defined(MIPS_DSP_R1_LE)
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"subu %[i], %[i], %[factor] \n\t"
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"sh %[out_s32], 0(%[data_out]) \n\t"
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"bgtz %[i], 1b \n\t"
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" addiu %[data_out], %[data_out], 2 \n\t"
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".set pop \n\t"
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: [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3),
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[tmp4] "=&r" (tmp4), [p_data_in] "=&r" (p_data_in), [k] "=&r" (k),
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[p_data_in_0] "+r" (p_data_in_0), [p_coefs] "=&r" (p_coefficients),
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[j] "=&r" (j), [out_s32] "=&r" (out_s32), [factor_2] "=&r" (factor_2),
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[i] "=&r" (i)
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: [coef_length] "r" (coefficients_length), [data_out] "r" (data_out),
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[p_coefs_0] "r" (p_coefficients_0), [endpos] "r" (endpos),
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#if !defined(MIPS_DSP_R1_LE)
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[max_16] "r" (max_16), [min_16] "r" (min_16),
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#endif // #if !defined(MIPS_DSP_R1_LE)
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[delay] "r" (delay), [factor] "r" (factor)
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: "memory", "hi", "lo"
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);
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#endif // #if defined(MIPS_DSP_R2_LE)
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return 0;
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}
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